A FPGA Serial Port Transmission Fault Analysis and Design Optimization

Shen Xiaohe; Niu Jing; Hu Xiaoxi

doi:doi:10.11648/j.sd.20200804.13

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A FPGA Serial Port Transmission Fault Analysis and Design Optimization

Shen Xiaohe, Niu Jing, Hu Xiaoxi

Published in Science Discovery (Volume 8, Issue 4)

Received: 21 June 2020 Published: 25 August 2020

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Abstract

One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a small amount of data sent by serial port are not collected correctly by the receiving equipment, and the fault happened by accident. This paper analyzes the reason of this fault and puts forward an effective solution to this problem. First of all, this paper analyzes the principle of serial port transmitting function and the fault phenomenon. It is found that the failure function is the FPGA serial port transmitting. Then, the serial transmission function of FPGA is further decomposed to list all possible cases, and the fault is reproduced in the function simulation by using Questa Sim. This paper carefully analyzes the mechanism of this failure and the probability of this failure. Finally, this paper proposed a solution, which is proved to be effective by experiments. This paper gives corresponding suggestions from three aspects of software design, engineering implementation and system testing. This has reference significance for the future engineering application.

Published in	Science Discovery (Volume 8, Issue 4)
DOI	10.11648/j.sd.20200804.13
Page(s)	74-78
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2020. Published by Science Publishing Group

Keywords

Serial Port Transmission, FPGA, Fault Analysis, State Machine

References

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[2]	张诚，孙列鹏，肖薇等.基于FPGA的串口实现[J].软件，2018，39（11）：219-223。
[3]	刘杰，臧炜，梁晓鹏等.一种新型的FPGA实现RS422串口通信方法[J].计算机测量与控制，2017，25（3）：191-194。
[4]	刘先博.基于FPGA与MCU的多串口通信接口设计与实现[D].南京：南京理工大学，2014：32-36。
[5]	孙毅.基于FPGA的智能串口设计与实现[D].西安：西安电子科技大学，2011：45-49。
[6]	熊海军，王耀青.一种基于FPGA的多路串口控制器设计[J].测控技术，2013，32（9）：137-143.
[7]	袁志军.基于FPGA的高速率多串口扩展的设计与实现[D].哈尔滨：哈尔滨工业大学，2008：25-26.
[8]	潘松，黄继业.EDA技术VHDL[M].北京：清华大学出版社，2006：1-3.
[9]	顾仁涛，王强.FPGA设计开发与工程实现[M].北京：北京邮电大学出版社，2013:1-15.
[10]	吴厚航.深入浅出玩转FPGA[M].北京：北京航空航天大学出版社，2010：156-159.

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Shen Xiaohe, Niu Jing, Hu Xiaoxi. (2020). A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Science Discovery, 8(4), 74-78. https://doi.org/10.11648/j.sd.20200804.13

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ACS Style

Shen Xiaohe; Niu Jing; Hu Xiaoxi. A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Sci. Discov. 2020, 8(4), 74-78. doi: 10.11648/j.sd.20200804.13

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AMA Style

Shen Xiaohe, Niu Jing, Hu Xiaoxi. A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Sci Discov. 2020;8(4):74-78. doi: 10.11648/j.sd.20200804.13

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@article{10.11648/j.sd.20200804.13,
  author = {Shen Xiaohe and Niu Jing and Hu Xiaoxi},
  title = {A FPGA Serial Port Transmission Fault Analysis and Design Optimization},
  journal = {Science Discovery},
  volume = {8},
  number = {4},
  pages = {74-78},
  doi = {10.11648/j.sd.20200804.13},
  url = {https://doi.org/10.11648/j.sd.20200804.13},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.sd.20200804.13},
  abstract = {One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a small amount of data sent by serial port are not collected correctly by the receiving equipment, and the fault happened by accident. This paper analyzes the reason of this fault and puts forward an effective solution to this problem. First of all, this paper analyzes the principle of serial port transmitting function and the fault phenomenon. It is found that the failure function is the FPGA serial port transmitting. Then, the serial transmission function of FPGA is further decomposed to list all possible cases, and the fault is reproduced in the function simulation by using Questa Sim. This paper carefully analyzes the mechanism of this failure and the probability of this failure. Finally, this paper proposed a solution, which is proved to be effective by experiments. This paper gives corresponding suggestions from three aspects of software design, engineering implementation and system testing. This has reference significance for the future engineering application.},
 year = {2020}
}

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TY  - JOUR
T1  - A FPGA Serial Port Transmission Fault Analysis and Design Optimization
AU  - Shen Xiaohe
AU  - Niu Jing
AU  - Hu Xiaoxi
Y1  - 2020/08/25
PY  - 2020
N1  - https://doi.org/10.11648/j.sd.20200804.13
DO  - 10.11648/j.sd.20200804.13
T2  - Science Discovery
JF  - Science Discovery
JO  - Science Discovery
SP  - 74
EP  - 78
PB  - Science Publishing Group
SN  - 2331-0650
UR  - https://doi.org/10.11648/j.sd.20200804.13
AB  - One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a small amount of data sent by serial port are not collected correctly by the receiving equipment, and the fault happened by accident. This paper analyzes the reason of this fault and puts forward an effective solution to this problem. First of all, this paper analyzes the principle of serial port transmitting function and the fault phenomenon. It is found that the failure function is the FPGA serial port transmitting. Then, the serial transmission function of FPGA is further decomposed to list all possible cases, and the fault is reproduced in the function simulation by using Questa Sim. This paper carefully analyzes the mechanism of this failure and the probability of this failure. Finally, this paper proposed a solution, which is proved to be effective by experiments. This paper gives corresponding suggestions from three aspects of software design, engineering implementation and system testing. This has reference significance for the future engineering application.
VL  - 8
IS  - 4
ER  -

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Author Information

Shen Xiaohe

Beijing Institute of Aerospace Control Devices, Beijing, China
Niu Jing

Beijing Institute of Aerospace Control Devices, Beijing, China
Hu Xiaoxi

Beijing Institute of Aerospace Control Devices, Beijing, China

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Plain Text BibTeX RIS

APA Style

Shen Xiaohe, Niu Jing, Hu Xiaoxi. (2020). A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Science Discovery, 8(4), 74-78. https://doi.org/10.11648/j.sd.20200804.13

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ACS Style

Shen Xiaohe; Niu Jing; Hu Xiaoxi. A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Sci. Discov. 2020, 8(4), 74-78. doi: 10.11648/j.sd.20200804.13

Copy | Download

AMA Style

Shen Xiaohe, Niu Jing, Hu Xiaoxi. A FPGA Serial Port Transmission Fault Analysis and Design Optimization. Sci Discov. 2020;8(4):74-78. doi: 10.11648/j.sd.20200804.13

Copy | Download

@article{10.11648/j.sd.20200804.13,
  author = {Shen Xiaohe and Niu Jing and Hu Xiaoxi},
  title = {A FPGA Serial Port Transmission Fault Analysis and Design Optimization},
  journal = {Science Discovery},
  volume = {8},
  number = {4},
  pages = {74-78},
  doi = {10.11648/j.sd.20200804.13},
  url = {https://doi.org/10.11648/j.sd.20200804.13},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.sd.20200804.13},
  abstract = {One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a small amount of data sent by serial port are not collected correctly by the receiving equipment, and the fault happened by accident. This paper analyzes the reason of this fault and puts forward an effective solution to this problem. First of all, this paper analyzes the principle of serial port transmitting function and the fault phenomenon. It is found that the failure function is the FPGA serial port transmitting. Then, the serial transmission function of FPGA is further decomposed to list all possible cases, and the fault is reproduced in the function simulation by using Questa Sim. This paper carefully analyzes the mechanism of this failure and the probability of this failure. Finally, this paper proposed a solution, which is proved to be effective by experiments. This paper gives corresponding suggestions from three aspects of software design, engineering implementation and system testing. This has reference significance for the future engineering application.},
 year = {2020}
}

Copy | Download

TY  - JOUR
T1  - A FPGA Serial Port Transmission Fault Analysis and Design Optimization
AU  - Shen Xiaohe
AU  - Niu Jing
AU  - Hu Xiaoxi
Y1  - 2020/08/25
PY  - 2020
N1  - https://doi.org/10.11648/j.sd.20200804.13
DO  - 10.11648/j.sd.20200804.13
T2  - Science Discovery
JF  - Science Discovery
JO  - Science Discovery
SP  - 74
EP  - 78
PB  - Science Publishing Group
SN  - 2331-0650
UR  - https://doi.org/10.11648/j.sd.20200804.13
AB  - One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a small amount of data sent by serial port are not collected correctly by the receiving equipment, and the fault happened by accident. This paper analyzes the reason of this fault and puts forward an effective solution to this problem. First of all, this paper analyzes the principle of serial port transmitting function and the fault phenomenon. It is found that the failure function is the FPGA serial port transmitting. Then, the serial transmission function of FPGA is further decomposed to list all possible cases, and the fault is reproduced in the function simulation by using Questa Sim. This paper carefully analyzes the mechanism of this failure and the probability of this failure. Finally, this paper proposed a solution, which is proved to be effective by experiments. This paper gives corresponding suggestions from three aspects of software design, engineering implementation and system testing. This has reference significance for the future engineering application.
VL  - 8
IS  - 4
ER  -

Copy | Download